GabrielTofvesson
e7f9e007d9
Update VGA module Quadrupled pixel clock Doubled resolution to 1280x800 Added ZigZag encode/decode to ALU
5 lines
274 B
Plaintext
5 lines
274 B
Plaintext
set_global_assignment -name IP_TOOL_NAME "RAM: 1-PORT"
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set_global_assignment -name IP_TOOL_VERSION "12.0"
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "cache.v"]
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set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cache_bb.v"]
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