3 Commits

Author SHA1 Message Date
635158444b Replaced tabs with spaces 2018-10-17 02:38:17 +02:00
8b9bd6e106 Added basic VGA graphics support
Generated some basic FastAdders
Generalized FastAdder to include all fast math modules
Other minor changes
2018-10-12 16:59:08 +02:00
1126ce5582 Added current Verilog files 2018-10-12 01:23:29 +02:00