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FreeCPU
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GabrielTofvesson
1126ce5582
Added current Verilog files
2018-10-12 01:23:29 +02:00
.gitignore
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2018-10-12 01:23:29 +02:00
altpll0_bb.v
Added current Verilog files
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altpll0.ppf
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altpll0.qip
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altpll0.v
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ALU.v
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Divider.v
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FastAdder.v
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LICENSE
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2018-10-12 01:08:09 +02:00
RAM.v
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README.md
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2018-10-12 01:08:09 +02:00
SDRAM.v
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SegmentHexEncoder.v
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SegmentManager.v
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SevenSegment.v
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VDivider.v
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README.md
FreeCPU
A CPU described in HDL for the Cyclone IV EP4CE6E22C8N
Description
A CPU described in HDL for the Cyclone IV EP4CE6E22C8N
Readme
72
KiB
Languages
Verilog
99.1%
Python
0.9%